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wireless components ask/fsk transmitter 868/433 mhz tda 5100 version 2.1 specification june 2001
edition 30.11.2000 published by infineon technologies ag, balanstra?e 73, 81541 mnchen ? infineon technologies ag 2001. all rights reserved. attention please! as far as patents or other rights of third parties are concerned, liability is only assumed for components, not for application s, processes and circuits im- plemented within components or assemblies. the information describes the type of component and shall not be considered as assured characteristics. terms of delivery and rights to change design reserved. due to technical requirements components may contain dangerous substances. for information on the types in question please cont act your nearest infineon technologies office. infineon technologies ag is an approved cecc manufacturer. packing please use the recycling operators known to you. we can also help you ? get in touch with your nearest sales office. by agreeme nt we will take packing material back, if it is sorted. you must bear the costs of transport. for packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for an y costs incurred. components used in life-support devices or systems must be expressly authorized for such purpose! critical components 1 of the infineon technologies ag, may only be used in life-support devices or systems 2 with the express written approval of the infineon technologies ag. 1 a critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life- support device or system, or to affect its safety or effectiveness of that device or system. 2 life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sust ain human life. if they fail, it is reasonable to assume that the health of the user may be endangered. abm ? , aop ? , arcofi ? , arcofi ? -ba, arcofi ? -sp, digitape ? , epic ? -1, epic ? -s, elic ? , falc ? 54, falc ? 56, falc ? -e1, falc ? -lh, idec ? , iom ? , iom ? -1, iom ? -2, ipat ? -2, isac ? -p, isac ? -s, isac ? -s te, isac ? -p te, itac ? , iwe ? , musac ? -a, octat ? -p, quat ? -s, sicat ? , sicofi ? , sicofi ? - 2, sicofi ? -4, sicofi ? -4c, slicofi ? are registered trademarks of infineon technologies ag. revision history current version: 2.1 as of 12.06..2001 previous version: 2.0, november 2000 page (in previous version) page (in current version) subjects (major changes since last revision) 3-3 ... 3-7 3-3 ... 3-7 schematics corrected: esd structures added 5-3 ... 5-8 5-3 ... 5-8 limits tightened for: supply current, saturation voltage of clock driver output and output power 5-5, 5-8 5-5,5-8 supply-voltage dependency of output power added as footnote 5-5, 5-8 5-5,5-8 limits corrected for input current csel 5-3, 5-6 5-3,5-6 limits corrected for low power detect current
product info product info wireless components specification, june 2001 package tda 5100 product info general description the TDA5100 is a single chip ask/ fsk transmitter for the frequency bands 868-870 mhz and 433-435 mhz. the ic offers a high level of inte- gration and needs only a few external components. the device contains a fully integrated pll synthesizer and a high efficiency power amplifier to drive a loop antenna. a special circuit design and an unique power amplifier design are used to save current consumption and therefore to save battery live. addi- tionally features like a power down mode, a low power detect, a selectable crystal oscillator frequency and a divided clock output are implemented. the ic can be used for both ask and fsk modulation. features fully integrated frequency synthe- sizer vco without external components high efficiency power amplifier switchable frequency range 868-870/433-435 mhz ask/fsk modulation low supply current (typically 7ma) voltage supply range 2.1 - 4 v power down mode low voltage sensor selectable crystal oscillator 6.78 mhz/13.56 mhz programmable divided clock output for c low external component count applications keyless entry systems remote control systems alarm systems communication systems ordering information type ordering code package tda 5100 q67036-a1048 p-tssop-16 available on tape and reel
1 table of contents 1 table of contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-i 2 product description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.3 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.4 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 3 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1 3.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3- 3 3.3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 -7 3.4 functional blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 4 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1 4.1 50 ohm-output testboard schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 50 ohm-output testboard layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 4.3 bill of material (50 ohm-output testboard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-4 4.4 hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 4.5 application board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8 4.6 application board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 4.7 bill of material (application board) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1 0 4.8 application board photo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 5 reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1 5.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.3 ac/dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-3
2 product description 2.1 overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.3 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.4 package outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 contents of this chapter
product description 2 - 2 tda 5100 wireless components specification, june 2001 2.1 overview the TDA5100 is a single chip ask/fsk transmitter for the frequency bands 868-870 mhz and 433-435 mhz. the ic offers a high level of integration and needs only a few external components. the device contains a fully integrated pll synthesizer and a high efficiency power amplifier to drive a loop antenna. a special circuit design and an unique power amplifier design are used to save current consumption and therefore to save battery life. additional features like a power down mode, a low power detect, a selectable crystal oscillator fre- quency and a divided clock output are implemented. the ic can be used for both ask and fsk modulation. 2.2 applications keyless entry systems remote control systems alarm systems communication systems 2.3 features fully integrated frequency synthesizer vco without external components high efficiency power amplifier switchable frequency range 868-870/433-435 mhz ask/fsk modulation low supply current (typically 7 ma) voltage supply range 2.1 - 4 v power down mode low voltage sensor selectable crystal oscillator 6.78 mhz/13.56 mhz programmable divided clock output for c low external component count
product description 2 - 3 tda 5100 wireless components specification, june 2001 2.4 package outlines figure 2-1 p-tssop-16
3 functional description 3.1 pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-2 3.2 pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3 3.3 functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7 3.4 functional blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.4.1 pll synthesizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.4.2 crystal oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8 3.4.3 power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9 3.4.4 low power detect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.4.5 power modes. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.4.5.1 power down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.4.5.2 pll enable mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.4.5.3 transmit mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10 3.4.6 recommended timing diagrams for ask- and fsk-modulation . . 3-12 contents of this chapter
functional description 3 - 2 tda 5100 wireless components specification, june 2001 3.1 pin configuration pin_config.wmf figure 3-1 ic pin configuration table 3-1 pin no. symbol function 1 pdwn power down mode control 2 lpd low power detect output 3 vs voltage supply 4 lf loop filter 5 gnd ground 6 askdta amplitude shift keying data input 7 fskdta frequency shift keying data input 8 clkout clock driver output 9 clkdiv clock divider control 10 cosc crystal oscillator input 11 fskout frequency shift keying switch output 12 fskgnd frequency shift keying ground 13 pagnd power amplifier ground 14 paout power amplifier output 15 fsel frequency range selection (433 or 868 mhz) 16 csel crystal frequency selection (6.78 or 13.56 mhz) csel fsel paout pagnd fskgnd fskout cosc clkdiv pdwn lpd vs lf gnd askdta fskdta clkout 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 tda 5100
functional description 3 - 3 tda 5100 wireless components specification, june 2001 3.2 pin definitions and functions table 3-2 pin no. symbol interface schematic function 1 pdwn disable pin for the complete transmitter cir- cuit. a logic low (pdwn < 0.7 v) turns off all transmitter functions. a logic high (pdwn > 1.5 v) gives access to all transmitter functions. pdwn input will be pulled up by 40 a inter- nally by either setting fskdta or askdta to a logic high-state. 2 lpd this pin provides an output indicating the low-voltage state of the supply voltage vs. vs < 2.15 v will set lpd to the low-state. an internal pull-up current of 40 a gives the output a high-state at supply voltages above 2.15 v. 3 vs this pin is the positive supply of the trans- mitter electronics. an rf bypass capacitor should be con- nected directly to this pin and returned to gnd (pin 5) as short as possible. 1 v s 150 k ? 5 k ? 250 k ? "o n " 40 a ? (askdta+fskdta) v s 300 ? 2 40 a
functional description 3 - 4 tda 5100 wireless components specification, june 2001 4 lf output of the charge pump and input of the vco control voltage. the loop bandwidth of the pll is 150 khz when only the internal loop filter is used. the loop bandwidth may be reduced by applying an external rc network referencing to the positive supply vs (pin 3). 5 gnd general ground connection. 6 askdta digital amplitude modulation can be imparted to the power amplifier through this pin. a logic high (askdta > 1.5 v or open) enables the power amplifier. a logic low (askdta < 0.5 v) disables the power amplifier. 7 fskdta digital frequency modulation can be imparted to the xtal oscillator by this pin. the vco-frequency varies in accordance to the frequency of the reference oscillator. a logic high (fskdta > 1.5v or open) sets the fsk switch to a high impedance state. a logic low (fskdta < 0.5 v) closes the fsk switch from fskout (pin 11) to fskgnd (pin 12). a capacitor can be switched to the reference crystal network this way. the xtal oscillator frequency will be shifted giving the designed fsk frequency deviation. v s 10 k ? 4 35 k ? 15 pf 140 pf v s +1.2 v 90 k ? 6 50 pf 30 a 60 k ? +1.1 v v s +1.2 v 90 k ? 7 30 a 60 k ? +1.1 v v s
functional description 3 - 5 tda 5100 wireless components specification, june 2001 8 clkout clock output to supply an external device. an external pull-up resistor has to be added in accordance to the driving requirements of the external device. a clock frequency of 3.39 mhz is selected by a logic low at clkdiv input (pin9). a clock frequency of 847.5 khz is selected by a logic high at clkdiv input (pin9). 9 clkdiv this pin is used to select the desired clock division rate for the clkout signal. a logic low (clkdiv < 0.2 v) applied to this pin selects the 3.39 mhz output signal at clkout (pin 8). a logic high (clkdiv open) applied to this pin selects the 847.5 khz output signal at clkout (pin 8). 10 cosc this pin is connected to the reference oscil- lator circuit. the reference oscillator is working as a neg- ative impedance converter. it presents a negative resistance in series to an induc- tance at the cosc pin. 11 fskout this pin is connected to a switch to fskgnd (pin 12). the switch is closed when the signal at fskdta (pin 7) is in a logic low state. the switch is open when the signal at fskdta (pin 7) is in a logic high state. fskout can switch an additional capacitor to the reference crystal network to pull the crystal frequency by an amount resulting in the desired fsk frequency shift of the trans- mitter output frequency. 12 fskgnd ground connection for fsk modulation out- put fskout. 8 300 ? v s +1.2 v 60 k ? 9 5 a 60 k ? +0.8 v v s v s 6 k 10 100 a v s v s v s 200 a 1.5 k 11 12 v s
functional description 3 - 6 tda 5100 wireless components specification, june 2001 13 pag n d ground connection of the power amplifier. the rf ground return path of the power amplifier output paout (pin 14) has to be concentrated to this pin. 14 pao u t rf output pin of the transmitter. a dc path to the positive supply vs has to be supplied by the antenna matching net- work. 15 fsel this pin is used to select the desired trans- mitter frequency. a logic low (fsel < 0.5 v) applied to this pin sets the transmitter to the 433 mhz fre- quency range. a logic high (fsel open) applied to this pin sets the transmitter to the 868 mhz fre- quency range. 16 csel this pin is used to select the desired refer- ence frequency. a logic low (csel < 0.2 v) applied to this pin sets the internal frequency divider to accept a reference frequency of 6.78 mhz. a logic high (csel open) applied to this pin sets the internal frequency divider to accept a reference frequency of 13.56 mhz. 14 13 +1.2 v 90 k ? 15 30 a 30 k ? +1.1 v v s +1.2 v 60 k ? 16 5 a 60 k ? +0.8 v v s v s
functional description 3 - 7 tda 5100 wireless components specification, june 2001 xtal osc :2/8 :4/16 pfd :128/64 vco :1/2 power amp lf low voltage sensor 2.2v power supply 7 13 2 14 13 15 4 16 8 9 10 11 12 fsk ground fsk data input power down control positive supply v s low power detect o utput power am plifier output power am plifier ground on frequency select 434/868 mhz loop filter crystal select 6.78/13.56 mhz clock output crystal 6.78/13.56 mhz clock output frequency select 0.85/3.39 mhz or 6 ask data input 5 ground fsk switch 3.3 functional block diagram block_diagram.wmf figure 3-2 functional block diagram
functional description 3 - 8 tda 5100 wireless components specification, june 2001 3.4 functional blocks 3.4.1 pll synthesizer the phase locked loop synthesizer consists of a voltage controlled oscillator (vco), an asynchronous divider chain, a phase detector, a charge pump and a loop filter. it is fully implemented on chip. the tuning circuit of the vco consist- ing of spiral inductors and varactor diodes is on chip, too. therefore no addi- tional external components are necessary. the nominal center frequency of the vco is 869 mhz. the oscillator signal is fed both, to the synthesizer divider chain and to the power amplifier. the overall division ratio of the asynchronous divider chain is 128 in case of a 6.78 mhz crystal or 64 in case of a 13.56 mhz crystal and can be selected via csel (pin 16). the phase detector is a type iv pd with charge pump. the passive loop filter is realized on chip. 3.4.2 crystal oscillator the crystal oscillator operates either at 6.78 mhz or at 13.56 mhz. the reference frequency can be chosen by the signal at csel (pin 16). for both quartz frequency options, 847.5 khz or 3.39 mhz are available as out- put frequencies of the clock output clkout (pin 8) to drive the clock input of a micro controller. the frequency at clkout (pin 8) is controlled by the signal at clkdiv (pin 9) table 3-3 csel (pin 16) crystal frequency low 1) 1) low: voltage at pin < 0.2 v 6.78 mhz open 2) 2) open: pin open 13.56 mhz table 3-4 clkdiv (pin 9) clkout frequency low 1) 1) low: voltage at pin < 0.2 v 3.39 mhz open 2) 2) open: pin open 847.5 khz
functional description 3 - 9 tda 5100 wireless components specification, june 2001 to achieve fsk transmission, the oscillator frequency can be detuned by a fixed amount by switching an external capacitor via fskout (pin 11). the condition of the switch is controlled by the signal at fskdta (pin 7). 3.4.3 power amplifier in case of operation in the 868-870 mhz band, the power amplifier is fed directly from the voltage controlled oscillator. in case of operation in the 433-435 mhz band, the vco frequency is divided by 2. this is controlled by fsel (pin 15) as described in the table below. the power amplifier can be switched on and off by the signal at askdta (pin 6). the power amplifier has an open collector output at paout (pin 14) and requires an external pull-up coil to provide bias. the coil is part of the tuning and matching lc circuitry to get best performance with the external loop antenna. to achieve the best power amplifier efficiency, the high frequency voltage swing at paout (pin 14) should be twice the supply voltage. the power amplifier has its own ground pin pagnd (pin 13) in order to reduce the amount of coupling to the other circuits. table 3-5 fskdta (pin7) fsk switch low 1) 1) low: voltage at pin < 0.5 v closed open 2) , high 3) 2) open: pin open 3) high: voltage at pin > 1.5 v open table 3-6 fsel (pin 15) radiated frequency band low 1) 1) low: voltage at pin < 0.5 v 433 mhz open 2) 2) open: pin open 868 mhz table 3-7 askdta (pin 6) power amplifier low 1) 1) low: voltage at pin < 0.5 v off open 2) , high 3) 2) open: pin open 3) high: voltage at pin > 1.5 v on
functional description 3 - 10 tda 5100 wireless components specification, june 2001 3.4.4 low power detect the supply voltage is sensed by a low power detector. when the supply voltage drops below 2.15 v, the output lpd (pin 2) switches to the low-state. to mini- mize the external component count, an internal pull-up current of 40 a gives the output a high-state at supply voltages above 2.15 v. the output lpd (pin 2) can either be connected to askdta (pin 6) to switch off the pa as soon as the supply voltage drops below 2.15 v or it can be used to inform a micro-controller to stop the transmission after the current data packet. 3.4.5 power modes the ic provides three power modes, the power down mode, the pll enable mode and the transmit mode. 3.4.5.1 power down mode in the power down mode the complete chip is switched off. the current consumption is less than 100na. 3.4.5.2 pll enable mode in the pll enable mode the pll is switched on but the power amplifier is turned off to avoid undesired power radiation during the time the pll needs to settle. the turn on time of the pll is determined mainly by the turn on time of the crystal oscillator and is less than 1 msec when the specified crystal is used. the current consumption is typically 3.5 ma. 3.4.5.3 transmit mode in the transmit mode the pll is switched on and the power amplifier is turned on too. the current consumption of the ic is typically 7 ma when using a proper trans- forming network at paout, see figure 4-1. 3.4.5.4 power mode control the bias circuitry is powered up via a voltage v > 1.5 v at the pin pdwn (pin 1). when the bias circuitry is powered up, the pins askdta and fskdta are pulled up internally. forcing the voltage at the pins low overrides the internally set state. alternatively, if the voltage at askdta or fskdta is forced high externally, the pdwn pin is pulled up internally via a current source. in this case, it is not nec- essary to connect the pdwn pin, it is recommended to leave it open.
functional description 3 - 11 tda 5100 wireless components specification, june 2001 the principle schematic of the power mode control circuitry is shown in figure 3-5. power_mode.wmf figure 3-5 power mode control circuitry table 3-8 provides a listing of how to get into the different power modes other combinations of the control pins pdwn, fskdta and askdta are not recommended. table 3-8 pdwn fskdta askdta mode low 1) 1) low: voltage at pin < 0.7 v (pdwn) voltage at pin < 0.5 v (fskdta, askdta) low, open low, open power down open 2) 2) open: pin open low low high 3) 3) high: voltage at pin > 1.5 v low, open, high low pll enable open high low high low, open, high open, high transmit open high open, high open low, open, high high or bias source fskdta askdta pdwn fskout paout tda 5100 on bias voltage pa on 120 k pll fsk 120 k 868 mhz
functional description 3 - 12 tda 5100 wireless components specification, june 2001 3.4.6 recommended timing diagrams for ask- and fsk-modulation ask modulation using fskdta and askdta, pdwn not connected ask_mod.wmf figure 3-6 ask modulation fsk modulation using fskdta and askdta, pdwn not connected fsk_mod.wmf figure 3-7 fsk modulation fskdta high low to askdta to min. 1 msec. t t data open, high low modes: transmit pll enable power down fskdta high low to askdta to min. 1 msec. t t data high low modes: transmit pll enable power down
functional description 3 - 13 tda 5100 wireless components specification, june 2001 alternative ask modulation, fskdta not connected. alt_ask_mod.wmf figure 3-8 alternative ask modulation alternative fsk modulation alt_fsk_mod.wmf figure 3-9 alternative fsk modulation pdwn high low to askdta to min. 1 msec. t t data open, high low modes: transmit pll enable power down fskdta to min. 1 msec. t data open, high low modes: transmit pll enable power down pdwn high low to t askdta open, high low to t
4 applications 4.1 50 ohm-output testboard schematic . . . . . . . . . . . . . . . . . . . . . . . . 4-2 4.2 50 ohm-output testboard layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-3 4.3 bill of material (50 ohm-output testboard) . . . . . . . . . . . . . . . . . . . . 4-4 4.4 hints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5 4.5 application board schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-8 4.6 application board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9 4.7 bill of material (application board) . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10 4.8 application board photo . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-11 contents of this chapter
applications 4 - 2 tda 5100 wireless components specification, june 2001 4.1 50 ohm-output testboard schematic 50ohm_test_v5.wmf figure 4-1 50 ? -output testboard schematic c6 l1 r1 c5 c3 c2 c8 c4 c1 x1sma 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TDA5100 vcc l2 c7 q1 vcc vcc r2 r4 r3f r3a x2sma t1 ask fsk 0.85 (3.4) mhz 6.78 (13.56) mhz 433 (868) mhz
applications 4 - 3 tda 5100 wireless components specification, june 2001 4.2 50 ohm-output testboard layout figure 4-2 top side of tda 5100-testboard with 50 ? -output figure 4-3 bottom side of tda 5100-testboard with 50 ? -output
applications 4 - 4 tda 5100 wireless components specification, june 2001 4.3 bill of material (50 ohm-output testboard) table 4-1 bill of material part value 434 mhz 869 mhz ask fsk specification r1 4.7 k ? 0805, 5% r2 12 k ? 0805, 5% r3a 15 k ? 0805, 5% r3f 15 k ? 0805, 5% r4 open 0805, 5% c1 47 nf 0805, x7r, 10% c2 39 pf 47 pf 0805, cog, 5% c3 3.9 pf 1.8 pf 0805, cog, 0.1 pf c4 330 pf 100 pf 0805, cog, 5% c5 1 nf 0805, x7r, 10% c6 8.2 pf 0805, cog, 0.1 pf c7 0 ? jumper 434mhz: 22 pf 868mhz: 47pf 0805, cog, 5% 0805, 0 ? jumper c8 15 pf 8.2 pf 0805, cog, 5% l1 100 nh 33 nh toko ll2012-j l2 39 nh 15 nh 39 nh: toko ll2012-j 15 nh: toko ll1608-j q3 13.56875 mhz, cl=20pf tokyo denpa tss-3b 13568.75 khz spec.no. 20-18906 ic1 TDA5100 t1 taster replaced by a short x1 sma-s sma standing x2 sma-s sma standing
applications 4 - 5 tda 5100 wireless components specification, june 2001 4.4 hints 1. application hints on the crystal oscillator as mentioned before, the crystal oscillator achieves a turn on time less than 1 msec. to achieve this, a nic oscillator type is implemented in the tda 5100. the input impedance of this oscillator is a negative resistance in series to an inductance. therefore the load capacitance of the crystal cl (specified by the crystal supplier) is transformed to the capacitance cv. cl: crystal load capacitance for nominal frequency : angular frequency l: inductivity of the crystal oscillator example for the ask-mode: referring to the application circuit, in ask-mode the capacitance c7 is replaced by a short to ground. assume a crystal frequency of 13.56 mhz and a crystal load capacitance of cl = 20 pf. the inductance l is specified within the elec- trical characteristics at 13.5 mhz to a value of 11 uh. therefore c6 is calculated to 7.7 pf. tda 5100 -r l f, cl cv l cl cv 2 1 1 + = 6 1 1 2 c l cl cv = + = formula 1)
applications 4 - 6 tda 5100 wireless components specification, june 2001 example for the fsk-mode: fsk modulation is achieved by switching the load capacitance of the crystal as shown below. the frequency deviation of the crystal oscillator is multiplied with the divider factor n of the phase locked loop to the output of the power amplifier. in case of small frequency deviations (up to +/- 1000 ppm), the two desired load capacitances can be calculated with the formula below. c l : crystal load capacitance for nominal frequency c 0 : shunt capacitance of the crystal f: frequency : = 2 f: angular frequency n: division ratio of the pll df: peak frequency deviation because of the inductive part of the tda 5100, these values must be corrected by formula 1). the value of cv can be calculated. tda 5100 -r l f, cl cv1 cv2 cosc fskout fskdta csw ) 1 ) 0 ( 2 1 ( 1 * 1 ) 1 ) 0 ( 2 1 ( 1 * 0 c cl c f n f c cl c f n f c cl cl + + ? + + ? = l cl cv 2 1 1 + =
applications 4 - 7 tda 5100 wireless components specification, june 2001 if the fsk switch is closed, cv_ is equal to cv1 (c6 in the application diagram). if the fsk switch is open, cv2 (c7 in the application diagram) can be calculated. csw: parallel capacitance of the fsk switch (3 pf) remark: these calculations are only approximations. the necessary values depend on the layout also and must be adapted for the specific application board. 2. design hints on the buffered clock output (clkout) the clkout pin is an open collector output. an external pull up resistor (rl) should be connected between this pin and the positive supply voltage. the value of rl is depending on the clock frequency and the load capacitance cld (pcb board plus input capacitance of the microcontroller). rl can be calculated to: remark: to achieve a low current consumption and a low spurious radiation, the largest possible rl should be chosen. table 4-2 fclkout= 847 khz fclkout= 3.39 mhz cl [ pf ] rl [ kohm ] cl [ pf ] rl [ kohm ] 5 27 5 6.8 10 12 10 3.3 20 6.8 20 1.8 1 ) ( ) 1 ( ) ( 1 7 2 cv cv csw cv cv cv csw c cv ? + + ? + ? ? = = cld fclkout rl * 8 * 1 =
applications 4 - 8 tda 5100 wireless components specification, june 2001 4.5 application board schematic application_circuit.wmf figure 4-4 application board schematic c6 c2 l1 c3 c1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 TDA5100 vcc l2 c7 q3 vcc vcc r2 r4 r3f r3a t1 0.85 (3.4) mhz 1 2 3 4 8 7 6 5 hcs360 vcc c4 antenna 6.78 (13.56) mhz 433 (868) mhz r1 c5 ask fsk
applications 4 - 9 tda 5100 wireless components specification, june 2001 4.6 application board layout figure 4-5 top side of tda 5100-application board figure 4-6 bottom side of tda 5100-application board
applications 4 - 10 tda 5100 wireless components specification, june 2001 4.7 bill of material (application board) table 4-3 bill of material part value 434 mhz 869 mhz ask fsk specification r1 4.7 k ? 0805, 5% r2 12 k ? 0805, 5% r3a 15 k ? 0805, 5% r3f 15 k ? 0805, 5% r4 15 k ? 0805, 5% c1 47 nf 0805, x7r, 10% c2 8.2 pf 1.5 pf 0805, cog, 5% c3 4.7 pf 1.0 pf 0805, cog, 0.1 pf c4 100 pf 0805, cog, 5% c5 4.7 nf 0805, x7r, 10% c6 8.2 pf 0805, cog, 0.1 pf c7 0 ? 434mhz: 22 pf 868mhz: 47pf 0805, cog, 5% 0805, 0 ? jumper l1 100 nh 27 nh toko ll2012-j l2 0 ? 22 nh 0 ? resistor bridge 22 nh: toko ll1608-j q3 13.56875 mhz cl=20pf tokyo denpa tss-3b 13568.75 khz spec.no. 20-18906 ic1 TDA5100 ic2 hcs360 microchip b1 batteriehalter hu2031-1, renata t1 taster sttskhmpw, alps
applications 4 - 11 tda 5100 wireless components specification, june 2001 4.8 application board photo v6_photo.wmf figure 4-7 photo of application board tda 5100 the total radiated spectrum measured can be summarized as: table 4-4 frequency erp at 434 mhz erp at 869 mhz regulations, limit ets 300 220 434/869 mhz carrier f c - 9 dbm -4 dbm +10 dbm f c + 13.5 mhz -75 dbm -51dbm -36 dbm f c ? 13.5 mhz -73 dbm -59 dbm -36/-54 dbm f c 847 khz -62 dbm - 67 dbm -36 dbm 2 nd harmonic -51dbm -56 dbm -36/-30 dbm 3 rd harmonic -42 dbm -72 dbm -30 dbm
5 reference 5.1 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.2 operating range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-2 5.3 ac/dc characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-3 contents of this chapter
reference 5 - 2 tda 5100 wireless components specification, june 2001 5.1 absolute maximum ratings the ac / dc characteristic limits are not guaranteed. the maximum ratings must not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the ic may result. ambient temperature under bias: t a =-25 to +85 c 5.2 operating range within the operational range the ic operates as described in the circuit description. table 5-1 parameter symbol limit values unit remarks min max junction temperature t j -40 150 c storage temperature t s -40 125 c thermal resistance r thja 230 k/w esd integrity, all pins v esd -1 +1 kv 100 pf, 1500 ? table 5-2 parameter symbol limit values unit test conditions min max supply voltage v s 2.1 4.0 v ambient temperature t a -25 85 c
reference 5 - 3 tda 5100 wireless components specification, june 2001 5.3 ac/dc characteristics 5.3.1 ac/dc characteristics at 3v, 25 c table 5-3 supply voltage v s = 3 v, ambient temperature t amb = 25 c parameter symbol limit values unit test conditions min typ max current consumption stand-by mode i s pdwn 100 na v (pins 1, 6 and 7) < 0.2 v pll enable mode i s pll_en 3.3 4.2 ma transmit mode 434 mhz i s transm 78.5 ma load tank see figure 4-1 and 4-2 transmit mode 868 mhz 78.7 ma power down mode control (pin 1) stand-by mode v pdwn 0 0.7 vv askdta < 0.2 v v fskdta < 0.2 v pll enable mode v pdwn 1.5 v s vv askdta < 0.5 v transmit mode v pdwn 1.5 v s vv askdta > 1.5 v input bias current pdwn i pdwn 30 a v pdwn = v s low power detect output (pin 2) internal pull up current i lpd1 30 a v s = 2.3 v ... v s input current low voltage i lpd2 1.2 ma v s = 1.9 v ... 2.1 v loop filter (pin 4) vco tuning voltage v lf v s - 1.5 v s - 0.7 vf vco = 869 mhz output frequency range 868 mhz-band f out, 868 854 869 884 mhz v s -v lf = 0.5v...1.8v v fsel = v s output frequency range 433 mhz-band f out, 433 427 434.5 442 mhz v s -v lf = 0.5v...1.8v v fsel = 0 v ask modulation data input (pin 6) ask transmit disabled v askdta 0 0.5 v ask transmit enabled v askdta 1.5 v s v input bias current askdta i askdta 30 a v askdta = v s input bias current askdta i askdta -20 a v askdta = 0 v ask data rate f askdta 20 khz
reference 5 - 4 tda 5100 wireless components specification, june 2001 table 5-3 supply voltage v s = 3 v, ambient temperature t amb = 25 c parameter symbol limit values unit test conditions min typ max fsk modulation data input (pin 7) fsk switch on v fskdta 0 0.5 v fsk switch off v fskdta 1.5 v s v input bias current fskdta i fskdta 30 a v fskdta = v s input bias current fskdta i fskdta -20 a v fskdta = 0 v fsk data rate f fskdta 20 khz clock driver output (pin 8) output current (low) i clkout 1.25 ma v clkout = v s output current (high) i clkout 5 a v clkout = v s saturation voltage (low) v satl 0.56 vi clkout = 1 ma clock divider control (pin 9) setting clock driver output frequency f clkout =3.39 mhz v clkdiv 0 0.2 v setting clock driver output frequency f clkout =847.5khz v clkdiv v pin open input bias current clkdiv i clkdiv 30 a v clkdiv = v s input bias current clkdiv i clkdiv -20 a v clkdiv = 0 v crystal oscillator input (pin 10) load capacitance c coscmax 5 pf serial resistance of the crys- tal 100 ? f = 6.78 mhz input inductance of the cosc pin 12 h f = 6.78 mhz serial resistance of the crys- tal 100 ? f = 13.56 mhz input inductance of the cosc pin 11 h f = 13.56 mhz fsk switch output (pin 11) on resistance r fskout 220 ? v fskdta = 0 v on capacitance c fskout 6 pf v fskdta = 0 v off resistance r fskout 10 k ? v fskdta = v s off capacitance c fskout 1.5 pf v fskdta = v s
reference 5 - 5 tda 5100 wireless components specification, june 2001 table 5-3 supply voltage v s = 3 v, ambient temperature t amb = 25 c parameter symbol limit values unit test conditions min typ max power amplifier output (pin 14) output power 1) transformed to 50 ohm p out433 4 56 dbm f out = 433 mhz v fsel = 0 v p out868 0 24 dbm f out = 868 mhz v fsel = v s frequency range selection (pin 15) transmit frequency 433 mhz v fsel 0 0.5 v transmit frequency 868 mhz v fsel v pin open input bias current fsel i fsel 30 a v fsel = v s input bias current fsel i fsel -20 a v fsel = 0 v crystal frequency selection (pin 16) crystal frequency 6.78 mhz v csel 0 0.2 v crystal frequency 13.56 mhz v csel v pin open input bias current csel i csel 50 a v csel = v s input bias current csel i csel -25 a v csel = 0 v 1) power amplifier in overcritical c-operation matching circuitry as used in the 50 ohm-output testboard at the specified frequency.
reference 5 - 6 tda 5100 wireless components specification, june 2001 5.3.2 ac/dc characteristics at 2.1 v ... 4.0 v, -25 c ... +85 c table 5-4 supply voltage v s = 2.1 v ... 4.0 v, ambient temperature t amb = -25 c ... +85 c parameter symbol limit values unit test conditions min typ max current consumption stand-by mode i s pdwn 250 na v (pins 1, 6 and 7) < 0.2 v pll enable mode i s pll_en 3.3 4.5 ma transmit mode vs = 2.1 v i s transm 8.2 ma load tank see figure 4-1 and 4-2 transmit mode vs = 3.0 v 78.7 ma transmit mode vs = 4.0 v 9.2 ma power down mode control (pin 1) stand-by mode v pdwn 0 0.5 vv askdta < 0.2 v v fskdta < 0.2 v pll enable mode v pdwn 1.5 v s vv askdta < 0.5 v transmit mode v pdwn 1.5 v s vv askdta > 1.5 v input bias current pdwn i pdwn 30 a v pdwn = v s low power detect output (pin 2) internal pull up current i lpd1 30 a v s = 2.3 v ... v s input current low voltage i lpd2 0.9 ma v s = 1.9 v ... 2.1 v loop filter (pin 4) vco tuning voltage v lf v s - 1.8 v s - 0.5 vf vco = 869 mhz output frequency range 868 mhz-band f out, 868 865 869 874 mhz v s -v lf = 0.43v...1.9v v fsel = v s output frequency range 433 mhz-band f out, 433 432.5 434.5 437 mhz v s -v lf = 0.43v...1.9v v fsel = 0 v ask modulation data input (pin 6) ask transmit disabled v askdta 0 0.5 v ask transmit enabled v askdta 1.5 v s v input bias current askdta i askdta 30 a v askdta = v s input bias current askdta i askdta -20 a v askdta = 0 v ask data rate f askdta 20 khz
reference 5 - 7 tda 5100 wireless components specification, june 2001 table 5-4 supply voltage v s = 2.1 v ... 4.0 v, ambient temperature t amb = -25 c ... +85 c parameter symbol limit values unit test conditions min typ max fsk modulation data input (pin 7) fsk switch on v fskdta 0 0.5 v fsk switch off v fskdta 1.5 v s v input bias current fskdta i fskdta 30 a v fskdta = v s input bias current fskdta i fskdta -20 a v fskdta = 0 v fsk data rate f fskdta 20 khz clock driver output (pin 8) output current (low) i clkout 1 ma v clkout = v s output current (high) i clkout 5 a v clkout = v s saturation voltage (low) 1) v satl 0.5 vi clkout = 0.8 ma clock divider control (pin 9) setting clock driver output frequency f clkout =3.39 mhz v clkdiv 0 0.2 v setting clock driver output frequency f clkout =847.5khz v clkdiv v pin open input bias current clkdiv i clkdiv 30 a v clkdiv = v s input bias current clkdiv i clkdiv -20 a v clkdiv = 0 v crystal oscillator input (pin 10) load capacitance c coscmax 5 pf serial resistance of the crys- tal 100 ? f = 6.78 mhz input inductance of the cosc pin 12 h f = 6.78 mhz serial resistance of the crys- tal 100 ? f = 13.56 mhz input inductance of the cosc pin 11 h f = 13.56 mhz fsk switch output (pin 11) on resistance r fskout 220 ? v fskdta = 0 v on capacitance c fskout 6 pf v fskdta = 0 v off resistance r fskout 10 k ? v fskdta = v s off capacitance c fskout 1.5 pf v fskdta = v s
reference 5 - 8 tda 5100 wireless components specification, june 2001 table 5-4 supply voltage v s = 2.1 v ... 4.0 v, ambient temperature t amb = -25 c ... +85 c parameter symbol limit values unit test conditions min typ max power amplifier output (pin 14) output power 2) at 434 mhz transformed to 50 ohm. v fsel = 0 v p out, 434 0.7 2.2 3.2 dbm v s = 2.1 v p out, 434 3 56.4 dbm v s = 3.0 v p out, 434 3.3 6.8 9.4 dbm v s = 4.0 v output power 3) at 868 mhz transformed to 50 ohm. v fsel = v s p out, 868 -2.3 0.2 1.8 dbm v s = 2.1 v p out, 868 -2.0 24.9 dbm v s = 3.0 v p out, 868 -1.7 3.2 7.2 dbm v s = 4.0 v frequency range selection (pin 15) transmit frequency 434 mhz v fsel 0 0.5 v transmit frequency 868 mhz v fsel v pin open input bias current fsel i fsel 30 a v fsel = v s input bias current fsel i fsel -20 a v fsel = 0 v crystal frequency selection (pin 16) crystal frequency 6.78 mhz v csel 0 0.2 v crystal frequency 13.56 mhz v csel v pin open input bias current csel i csel 50 a v csel = v s input bias current csel i csel -25 a v csel = 0 v 1) derating linearly to a saturation voltage of max. 140 mv at i clkout = 0 ma 2) matching circuitry as used in the 50 ohm-output testboard for 434 mhz operation. range @ 2.1 v, +25 c: 2.2 dbm +/- 0.7 dbm temperature dependency at 2.1 v: +0.3 dbm@-25 c and -0.8 dbm@+85 c, reference +25 c. range @ 3.0 v, +25 c: 5.0 dbm +/- 1.0 dbm temperature dependency at 3.0 v: +0.4 dbm@-25 c and -1.0 dbm@+85 c, reference +25 c. range @ 4.0 v, +25 c: 6.8 dbm +/- 2.0 dbm temperature dependency at 4.0 v: +0.6 dbm@-25 c and -1.5 dbm@+85 c, reference +25 c. 3) matching circuitry as used in the 50 ohm-output testboard for 868 mhz operation. range @ 2.1 v, +25 c: 0.2 dbm +/- 1.0 dbm temperature dependency at 2.1 v: +0.6 dbm@-25 c and -1.5 dbm@+85 c, reference +25 c. range @ 3.0 v, +25 c: 2.0 dbm +/- 2.0 dbm temperature dependency at 3.0 v: +0.9 dbm@-25 c and -2.0 dbm@+85 c, reference +25 c. range @ 4.0 v, +25 c: 3.2 dbm +/- 2.7 dbm temperature dependency at 4.0 v: +1.3 dbm@-25 c and -2.2 dbm@+85 c, reference +25 c. a smaller load impedance reduces the supply-voltage dependency. a higher load impedance reduces the temperature dependency.

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